mirror of
https://github.com/sle118/squeezelite-esp32.git
synced 2025-12-06 19:47:02 +03:00
176 lines
4.9 KiB
C
176 lines
4.9 KiB
C
/*
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* ESPRESSIF MIT License
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*
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* Copyright (c) 2018 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
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*
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* Permission is hereby granted for use on all ESPRESSIF SYSTEMS products, in which case,
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* it is free of charge, to any person obtaining a copy of this software and associated
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* documentation files (the "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
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* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __AC101_H__
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#define __AC101_H__
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#include "esp_types.h"
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#define AC101_ADDR 0x1a /*!< Device address*/
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#define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
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#define READ_BIT I2C_MASTER_READ /*!< I2C master read */
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#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
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#define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
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#define ACK_VAL 0x0 /*!< I2C ack value */
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#define NACK_VAL 0x1 /*!< I2C nack value */
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#define CHIP_AUDIO_RS 0x00
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#define PLL_CTRL1 0x01
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#define PLL_CTRL2 0x02
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#define SYSCLK_CTRL 0x03
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#define MOD_CLK_ENA 0x04
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#define MOD_RST_CTRL 0x05
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#define I2S_SR_CTRL 0x06
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#define I2S1LCK_CTRL 0x10
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#define I2S1_SDOUT_CTRL 0x11
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#define I2S1_SDIN_CTRL 0x12
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#define I2S1_MXR_SRC 0x13
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#define I2S1_VOL_CTRL1 0x14
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#define I2S1_VOL_CTRL2 0x15
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#define I2S1_VOL_CTRL3 0x16
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#define I2S1_VOL_CTRL4 0x17
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#define I2S1_MXR_GAIN 0x18
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#define ADC_DIG_CTRL 0x40
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#define ADC_VOL_CTRL 0x41
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#define HMIC_CTRL1 0x44
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#define HMIC_CTRL2 0x45
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#define HMIC_STATUS 0x46
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#define DAC_DIG_CTRL 0x48
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#define DAC_VOL_CTRL 0x49
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#define DAC_MXR_SRC 0x4c
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#define DAC_MXR_GAIN 0x4d
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#define ADC_ANA_CTRL 0x50
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#define ADC_SRC 0x51
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#define ADC_SRCBST_CTRL 0x52
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#define OMIXER_DACA_CTRL 0x53
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#define OMIXER_SR 0x54
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#define OMIXER_BST1_CTRL 0x55
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#define HPOUT_CTRL 0x56
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#define SPKOUT_CTRL 0x58
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#define AC_DAC_DAPCTRL 0xa0
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#define AC_DAC_DAPHHPFC 0xa1
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#define AC_DAC_DAPLHPFC 0xa2
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#define AC_DAC_DAPLHAVC 0xa3
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#define AC_DAC_DAPLLAVC 0xa4
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#define AC_DAC_DAPRHAVC 0xa5
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#define AC_DAC_DAPRLAVC 0xa6
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#define AC_DAC_DAPHGDEC 0xa7
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#define AC_DAC_DAPLGDEC 0xa8
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#define AC_DAC_DAPHGATC 0xa9
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#define AC_DAC_DAPLGATC 0xaa
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#define AC_DAC_DAPHETHD 0xab
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#define AC_DAC_DAPLETHD 0xac
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#define AC_DAC_DAPHGKPA 0xad
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#define AC_DAC_DAPLGKPA 0xae
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#define AC_DAC_DAPHGOPA 0xaf
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#define AC_DAC_DAPLGOPA 0xb0
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#define AC_DAC_DAPOPT 0xb1
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#define DAC_DAP_ENA 0xb5
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typedef enum{
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SAMPLE_RATE_8000 = 0x0000,
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SAMPLE_RATE_11052 = 0x1000,
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SAMPLE_RATE_12000 = 0x2000,
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SAMPLE_RATE_16000 = 0x3000,
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SAMPLE_RATE_22050 = 0x4000,
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SAMPLE_RATE_24000 = 0x5000,
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SAMPLE_RATE_32000 = 0x6000,
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SAMPLE_RATE_44100 = 0x7000,
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SAMPLE_RATE_48000 = 0x8000,
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SAMPLE_RATE_96000 = 0x9000,
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SAMPLE_RATE_192000 = 0xa000,
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} ac_adda_fs_i2s1_t;
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typedef enum{
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BCLK_DIV_1 = 0x0,
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BCLK_DIV_2 = 0x1,
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BCLK_DIV_4 = 0x2,
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BCLK_DIV_6 = 0x3,
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BCLK_DIV_8 = 0x4,
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BCLK_DIV_12 = 0x5,
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BCLK_DIV_16 = 0x6,
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BCLK_DIV_24 = 0x7,
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BCLK_DIV_32 = 0x8,
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BCLK_DIV_48 = 0x9,
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BCLK_DIV_64 = 0xa,
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BCLK_DIV_96 = 0xb,
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BCLK_DIV_128 = 0xc,
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BCLK_DIV_192 = 0xd,
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} ac_i2s1_bclk_div_t;
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typedef enum{
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LRCK_DIV_16 =0x0,
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LRCK_DIV_32 =0x1,
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LRCK_DIV_64 =0x2,
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LRCK_DIV_128 =0x3,
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LRCK_DIV_256 =0x4,
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} ac_i2s1_lrck_div_t;
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typedef enum {
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BIT_LENGTH_8_BITS = 0x00,
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BIT_LENGTH_16_BITS = 0x01,
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BIT_LENGTH_20_BITS = 0x02,
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BIT_LENGTH_24_BITS = 0x03,
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} ac_bits_length_t;
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typedef enum {
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AC_MODE_MIN = -1,
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AC_MODE_SLAVE = 0x00,
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AC_MODE_MASTER = 0x01,
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AC_MODE_MAX,
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} ac_mode_sm_t;
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typedef enum {
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AC_MODULE_MIN = -1,
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AC_MODULE_ADC = 0x01,
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AC_MODULE_DAC = 0x02,
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AC_MODULE_ADC_DAC = 0x03,
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AC_MODULE_LINE = 0x04,
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AC_MODULE_MAX
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} ac_module_t;
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typedef enum{
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SRC_MIC1 = 1,
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SRC_MIC2 = 2,
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SRC_LINEIN = 3,
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}ac_output_mixer_source_t;
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typedef enum {
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GAIN_N45DB = 0,
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GAIN_N30DB = 1,
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GAIN_N15DB = 2,
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GAIN_0DB = 3,
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GAIN_15DB = 4,
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GAIN_30DB = 5,
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GAIN_45DB = 6,
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GAIN_60DB = 7,
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} ac_output_mixer_gain_t;
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typedef struct {
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ac_i2s1_bclk_div_t bclk_div; /*!< bits clock divide */
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ac_i2s1_lrck_div_t lclk_div; /*!< WS clock divide */
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} ac_i2s_clock_t;
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#endif |