mirror of
https://github.com/sle118/squeezelite-esp32.git
synced 2025-12-07 12:07:09 +03:00
Merge remote-tracking branch 'origin/master' into master-cmake
Conflicts: README.md build-scripts/ESP32-A1S-sdkconfig.defaults build-scripts/I2S-4MFlash-sdkconfig.defaults build-scripts/NonOTA-I2S-4MFlash-sdkconfig.defaults build-scripts/NonOTA-SqueezeAmp-sdkconfig.defaults build-scripts/SqueezeAmp4MBFlash-sdkconfig.defaults build-scripts/SqueezeAmp8MBFlash-sdkconfig.defaults
This commit is contained in:
374
components/display/ILI9341.c
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374
components/display/ILI9341.c
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@@ -0,0 +1,374 @@
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/**
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* Copyright (c) 2017-2018 Tara Keeling
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* 2020 Philippe G.
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*
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* This software is released under the MIT License.
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* https://opensource.org/licenses/MIT
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*/
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#include <stdio.h>
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#include <string.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "driver/gpio.h"
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#include <esp_heap_caps.h>
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#include <esp_log.h>
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#include "gds.h"
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#include "gds_private.h"
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//#define SHADOW_BUFFER
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#define PAGE_BLOCK 1024
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#define min(a,b) (((a) < (b)) ? (a) : (b))
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static char TAG[] = "ILI9341";
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#define L1_CMD_NOP 0X00
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#define L1_CMD_SOFTWARE_RESET 0X01
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#define L1_CMD_READ_DISPLAY_IDENTIFICATION_INFORMATION 0X04
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#define L1_CMD_READ_DISPLAY_STATUS 0X09
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#define L1_CMD_READ_DISPLAY_POWER_MODE 0X0A
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#define L1_CMD_READ_DISPLAY_MADCTL 0X0B
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#define L1_CMD_READ_DISPLAY_PIXEL_FORMAT 0X0C
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#define L1_CMD_READ_DISPLAY_IMAGE_FORMAT 0X0D
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#define L1_CMD_READ_DISPLAY_SIGNAL_MODE 0X0E
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#define L1_CMD_READ_DISPLAY_SELF_DIAGNOSTIC_RESULT 0X0F
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#define L1_CMD_ENTER_SLEEP_MODE 0X10
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#define L1_CMD_SLEEP_OUT 0X11
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#define L1_CMD_PARTIAL_MODE_ON 0X12
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#define L1_CMD_NORMAL_DISPLAY_MODE_ON 0X13
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#define L1_CMD_DISPLAY_INVERSION_OFF 0X20
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#define L1_CMD_DISPLAY_INVERSION_ON 0X21
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#define L1_CMD_GAMMA_SET 0X26
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#define L1_CMD_DISPLAY_OFF 0X28
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#define L1_CMD_DISPLAY_ON 0X29
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#define L1_CMD_COLUMN_ADDRESS_SET 0X2A
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#define L1_CMD_PAGE_ADDRESS_SET 0X2B
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#define L1_CMD_MEMORY_WRITE 0X2C
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#define L1_CMD_COLOR_SET 0X2D
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#define L1_CMD_MEMORY_READ 0X2E
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#define L1_CMD_PARTIAL_AREA 0X30
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#define L1_CMD_VERTICAL_SCROLLING_DEFINITION 0X33
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#define L1_CMD_TEARING_EFFECT_LINE_OFF 0X34
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#define L1_CMD_TEARING_EFFECT_LINE_ON 0X35
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#define L1_CMD_MEMORY_ACCESS_CONTROL 0X36
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#define L1_CMD_VERTICAL_SCROLLING_START_ADDRESS 0X37
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#define L1_CMD_IDLE_MODE_OFF 0X38
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#define L1_CMD_IDLE_MODE_ON 0X39
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#define L1_CMD_COLMOD_PIXEL_FORMAT_SET 0X3A
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#define L1_CMD_WRITE_MEMORY_CONTINUE 0X3C
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#define L1_CMD_READ_MEMORY_CONTINUE 0X3E
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#define L1_CMD_SET_TEAR_SCANLINE 0X44
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#define L1_CMD_GET_SCANLINE 0X45
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#define L1_CMD_WRITE_DISPLAY_BRIGHTNESS 0X51
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#define L1_CMD_READ_DISPLAY_BRIGHTNESS 0X52
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#define L1_CMD_WRITE_CTRL_DISPLAY 0X53
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#define L1_CMD_READ_CTRL_DISPLAY 0X54
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#define L1_CMD_WRITE_CONTENT_ADAPTIVE_BRIGHTNESS_CONTROL 0X55
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#define L1_CMD_READ_CONTENT_ADAPTIVE_BRIGHTNESS_CONTROL 0X56
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#define L1_CMD_WRITE_CABC_MINIMUM_BRIGHTNESS 0X5E
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#define L1_CMD_READ_CABC_MINIMUM_BRIGHTNESS 0X5F
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#define L1_CMD_READ_ID1 0XDA
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#define L1_CMD_READ_ID2 0XDB
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#define L1_CMD_READ_ID3 0XDC
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#define L2_CMD_RGB_INTERFACE_SIGNAL_CONTROL 0XB0
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#define L2_CMD_FRAME_RATE_CONTROL_IN_NORMAL_MODE_FULL_COLORS 0XB1
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#define L2_CMD_FRAME_RATE_CONTROL_IN_IDLE_MODE_8_COLORS 0XB2
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#define L2_CMD_FRAME_RATE_CONTROL_IN_PARTIAL_MODE_FULL_COLORS 0XB3
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#define L2_CMD_DISPLAY_INVERSION_CONTROL 0XB4
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#define L2_CMD_BLANKING_PORCH_CONTROL 0XB5
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#define L2_CMD_DISPLAY_FUNCTION_CONTROL 0XB6
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#define L2_CMD_ENTRY_MODE_SET 0XB7
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#define L2_CMD_BACKLIGHT_CONTROL_1 0XB8
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#define L2_CMD_BACKLIGHT_CONTROL_2 0XB9
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#define L2_CMD_BACKLIGHT_CONTROL_3 0XBA
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#define L2_CMD_BACKLIGHT_CONTROL_4 0XBB
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#define L2_CMD_BACKLIGHT_CONTROL_5 0XBC
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#define L2_CMD_BACKLIGHT_CONTROL_7 0XBE
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#define L2_CMD_BACKLIGHT_CONTROL_8 0XBF
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#define L2_CMD_POWER_CONTROL_1 0XC0
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#define L2_CMD_POWER_CONTROL_2 0XC1
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#define L2_CMD_VCOM_CONTROL_1 0XC5
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#define L2_CMD_VCOM_CONTROL_2 0XC7
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#define L2_CMD_NV_MEMORY_WRITE 0XD0
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#define L2_CMD_NV_MEMORY_PROTECTION_KEY 0XD1
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#define L2_CMD_NV_MEMORY_STATUS_READ 0XD2
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#define L2_CMD_READ_ID4 0XD3
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#define L2_CMD_POSITIVE_GAMMA_CORRECTION 0XE0
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#define L2_CMD_NEGATIVE_GAMMA_CORRECTION 0XE1
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#define L2_CMD_DIGITAL_GAMMA_CONTROL_1 0XE2
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#define L2_CMD_DIGITAL_GAMMA_CONTROL_2 0XE3
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#define L2_CMD_INTERFACE_CONTROL 0XF6
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/*
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The LCD needs a bunch of command/argument values to be initialized. They are stored in this struct.
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*/
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typedef struct {
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uint8_t cmd;
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uint8_t data[16];
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uint8_t databytes; //No of data in data; bit 7 = delay after set; 0xFF = end of cmds.
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} lcd_init_cmd_t;
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static const lcd_init_cmd_t ili_init_cmds[]={
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/* Power contorl B, power control = 0, DC_ENA = 1 */
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{0xCF, {0x00, 0x83, 0X30}, 3},
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/* Power on sequence control,
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* cp1 keeps 1 frame, 1st frame enable
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* vcl = 0, ddvdh=3, vgh=1, vgl=2
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* DDVDH_ENH=1
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*/
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{0xED, {0x64, 0x03, 0X12, 0X81}, 4},
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/* Driver timing control A,
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* non-overlap=default +1
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* EQ=default - 1, CR=default
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* pre-charge=default - 1
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*/
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{0xE8, {0x85, 0x01, 0x79}, 3},
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/* Power control A, Vcore=1.6V, DDVDH=5.6V */
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{0xCB, {0x39, 0x2C, 0x00, 0x34, 0x02}, 5},
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/* Pump ratio control, DDVDH=2xVCl */
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{0xF7, {0x20}, 1},
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/* Driver timing control, all=0 unit */
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{0xEA, {0x00, 0x00}, 2},
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/* Power control 1, GVDD=4.75V */
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{0xC0, {0x26}, 1},
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/* Power control 2, DDVDH=VCl*2, VGH=VCl*7, VGL=-VCl*3 */
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{0xC1, {0x11}, 1},
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/* VCOM control 1, VCOMH=4.025V, VCOML=-0.950V */
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{0xC5, {0x35, 0x3E}, 2},
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/* VCOM control 2, VCOMH=VMH-2, VCOML=VML-2 */
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{0xC7, {0xBE}, 1},
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/* Memory access contorl, MX=MY=0, MV=1, ML=0, BGR=1, MH=0 */
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{0x36, {0x28}, 1},
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/* Pixel format, 16bits/pixel for RGB/MCU interface */
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{0x3A, {0x55}, 1},
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/* Frame rate control, f=fosc, 70Hz fps */
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{0xB1, {0x00, 0x1B}, 2},
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/* Enable 3G, disabled */
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{0xF2, {0x08}, 1},
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/* Gamma set, curve 1 */
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{0x26, {0x01}, 1},
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/* Positive gamma correction */
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{0xE0, {0x1F, 0x1A, 0x18, 0x0A, 0x0F, 0x06, 0x45, 0X87, 0x32, 0x0A, 0x07, 0x02, 0x07, 0x05, 0x00}, 15},
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/* Negative gamma correction */
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{0XE1, {0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3A, 0x78, 0x4D, 0x05, 0x18, 0x0D, 0x38, 0x3A, 0x1F}, 15},
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/* Column address set, SC=0, EC=0xEF */
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{0x2A, {0x00, 0x00, 0x00, 0xEF}, 4},
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/* Page address set, SP=0, EP=0x013F */
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{0x2B, {0x00, 0x00, 0x01, 0x3f}, 4},
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/* Memory write */
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{0x2C, {0}, 0},
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/* Entry mode set, Low vol detect disabled, normal display */
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{0xB7, {0x07}, 1},
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/* Display function control */
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{0xB6, {0x0A, 0x82, 0x27, 0x00}, 4},
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/* Sleep out */
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{0x11, {0}, 0x80},
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/* Display on */
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{0x29, {0}, 0x80},
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{0, {0}, 0xff},
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};
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//To speed up transfers, every SPI transfer sends a bunch of lines. This define specifies how many. More means more memory use,
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//but less overhead for setting up / finishing transfers. Make sure 240 is dividable by this.
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#define PARALLEL_LINES 16
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struct PrivateSpace {
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uint8_t *iRAM, *Shadowbuffer;
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uint8_t ReMap, PageSize;
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uint8_t Offset;
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};
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// Functions are not declared to minimize # of lines
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static void WriteDataByte( struct GDS_Device* Device, uint8_t Data ) {
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Device->WriteData( Device, &Data, 1);
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}
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static void SetColumnAddress( struct GDS_Device* Device, uint8_t Start, uint8_t End ) {
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Device->WriteCommand( Device, L1_CMD_COLUMN_ADDRESS_SET );
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Device->WriteData( Device, &Start, 1 );
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Device->WriteData( Device, &End, 1 );
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}
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static void SetRowAddress( struct GDS_Device* Device, uint8_t Start, uint8_t End ) {
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Device->WriteCommand( Device, L1_CMD_PAGE_ADDRESS_SET );
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Device->WriteData( Device, &Start, 1 );
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Device->WriteData( Device, &End, 1 );
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}
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static void Update( struct GDS_Device* Device ) {
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struct PrivateSpace *Private = (struct PrivateSpace*) Device->Private;
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//SetColumnAddress( Device, Private->Offset, Private->Offset + Device->Width / 4 - 1);
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SetColumnAddress( Device, Private->Offset, Private->Offset + Device->Width - 1);
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#ifdef SHADOW_BUFFER
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uint16_t *optr = (uint16_t*) Private->Shadowbuffer, *iptr = (uint16_t*) Device->Framebuffer;
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bool dirty = false;
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for (int r = 0, page = 0; r < Device->Height; r++) {
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// look for change and update shadow (cheap optimization = width always / by 2)
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for (int c = Device->Width / 2 / 2; --c >= 0;) {
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if (*optr != *iptr) {
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dirty = true;
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*optr = *iptr;
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}
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iptr++; optr++;
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}
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// one line done, check for page boundary
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if (++page == Private->PageSize) {
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if (dirty) {
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uint16_t *optr = (uint16_t*) Private->iRAM, *iptr = (uint16_t*) (Private->Shadowbuffer + (r - page + 1) * Device->Width / 2);
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SetRowAddress( Device, r - page + 1, r );
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for (int i = page * Device->Width / 2 / 2; --i >= 0; iptr++) *optr++ = (*iptr >> 8) | (*iptr << 8);
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//memcpy(Private->iRAM, Private->Shadowbuffer + (r - page + 1) * Device->Width / 2, page * Device->Width / 2 );
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Device->WriteCommand( Device, 0x5c );
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Device->WriteData( Device, Private->iRAM, Device->Width * page / 2 );
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dirty = false;
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}
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page = 0;
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}
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}
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#else
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for (int r = 0; r < Device->Height; r += Private->PageSize) {
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SetRowAddress( Device, r, r + Private->PageSize - 1 );
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Device->WriteCommand( Device, L1_CMD_MEMORY_WRITE );
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if (Private->iRAM) {
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uint16_t *optr = (uint16_t*) Private->iRAM, *iptr = (uint16_t*) (Device->Framebuffer + r * Device->Width / 2);
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for (int i = Private->PageSize * Device->Width / 2 / 2; --i >= 0; iptr++) *optr++ = (*iptr >> 8) | (*iptr << 8);
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//memcpy(Private->iRAM, Device->Framebuffer + r * Device->Width / 2, Private->PageSize * Device->Width / 2 );
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Device->WriteData( Device, Private->iRAM, Private->PageSize * Device->Width / 2 );
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} else {
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Device->WriteData( Device, Device->Framebuffer + r * Device->Width / 2, Private->PageSize * Device->Width / 2 );
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}
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}
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#endif
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}
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//Bit Name Description
|
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//--- --------------------------- ------------------------------------------------------
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//MY Row Address Order MCU to memory write/read direction.
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//MX Column Address Order MCU to memory write/read direction.
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//MV Row / Column Exchange MCU to memory write/read direction.
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//ML Vertical Refresh Order LCD vertical refresh direction control.
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//BGR RGB-BGR Order Color selector switch control
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// (0=RGB color filter panel, 1=BGR color filter panel)
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//MH Horizontal Refresh ORDER LCD horizontal refreshing direction control.
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// Bits 17-0
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// XX XX XX XX XX XX XX XX XX XX MY MX MV ML BGR MH 0 0
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typedef enum {
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MAC_BIT_MH=2,
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MAC_BIT_BGR,
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MAC_BIT_ML,
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MAC_BIT_MV,
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MAC_BIT_MX,
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MAC_BIT_MY,
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} mac_bits;
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uint16_t set_mac_bit(mac_bits bit, uint16_t val){
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return (1 << bit) | val;
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}
|
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uint16_t unset_mac_bit(mac_bits bit, uint16_t val){
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return ~(1 << bit) & val;
|
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}
|
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|
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static void SetHFlip( struct GDS_Device* Device, bool On ) {
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struct PrivateSpace *Private = (struct PrivateSpace*) Device->Private;
|
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Private->ReMap = On ? (Private->ReMap & ~(1 << MAC_BIT_MX)) : (Private->ReMap | (1 << MAC_BIT_MX));
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Device->WriteCommand( Device, L1_CMD_MEMORY_ACCESS_CONTROL );
|
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Device->WriteData( Device, &Private->ReMap, 1 );
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WriteDataByte(Device,0x00);
|
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|
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}
|
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|
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static void SetVFlip( struct GDS_Device *Device, bool On ) {
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struct PrivateSpace *Private = (struct PrivateSpace*) Device->Private;
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Private->ReMap = On ? (Private->ReMap | (1 << MAC_BIT_MY)) : (Private->ReMap & ~(1 << MAC_BIT_MY));
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||||
Device->WriteCommand( Device, 0xA0 );
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||||
Device->WriteData( Device, &Private->ReMap, 1 );
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WriteDataByte(Device,0x00);
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||||
|
||||
}
|
||||
|
||||
static void DisplayOn( struct GDS_Device* Device ) { Device->WriteCommand( Device, L1_CMD_DISPLAY_ON ); }
|
||||
static void DisplayOff( struct GDS_Device* Device ) { Device->WriteCommand( Device, L1_CMD_DISPLAY_OFF ); }
|
||||
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||||
static void SetContrast( struct GDS_Device* Device, uint8_t Contrast ) {
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||||
Device->WriteCommand( Device, L1_CMD_WRITE_DISPLAY_BRIGHTNESS );
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||||
uint8_t loc_contrast = (uint8_t)((float)Contrast/5.0f* 255.0f);
|
||||
Device->WriteData( Device, &loc_contrast , 1 );
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WriteDataByte(Device,0x00);
|
||||
}
|
||||
|
||||
static bool Init( struct GDS_Device* Device ) {
|
||||
struct PrivateSpace *Private = (struct PrivateSpace*) Device->Private;
|
||||
|
||||
|
||||
// Private->Offset = (480 - Device->Width) / 4 / 2;
|
||||
|
||||
// find a page size that is not too small is an integer of height
|
||||
Private->PageSize = min(8, PAGE_BLOCK / (Device->Width / 2));
|
||||
Private->PageSize = Device->Height / (Device->Height / Private->PageSize) ;
|
||||
|
||||
#ifdef SHADOW_BUFFER
|
||||
// Private->Shadowbuffer = malloc( Device->FramebufferSize );
|
||||
// memset(Private->Shadowbuffer, 0xFF, Device->FramebufferSize);
|
||||
#endif
|
||||
Private->iRAM =NULL;
|
||||
//Private->iRAM =heap_caps_malloc(320*PARALLEL_LINES*sizeof(uint16_t), MALLOC_CAP_DMA);
|
||||
|
||||
|
||||
//ESP_LOGI(TAG, "ILI9341 with offset %u, page %u, iRAM %p", Private->Offset, Private->PageSize, Private->iRAM);
|
||||
ESP_LOGI(TAG, "ILI9341 ");
|
||||
|
||||
// need to be off and disable display RAM
|
||||
Device->DisplayOff( Device );
|
||||
int cmd=0;
|
||||
//Send all the commands
|
||||
while (ili_init_cmds[cmd].databytes!=0xff) {
|
||||
Device->WriteCommand( Device, ili_init_cmds[cmd].cmd );
|
||||
Device->WriteData(Device,ili_init_cmds[cmd].data,ili_init_cmds[cmd].databytes&0x1F);
|
||||
if (ili_init_cmds[cmd].databytes&0x80) {
|
||||
vTaskDelay(100 / portTICK_RATE_MS);
|
||||
}
|
||||
cmd++;
|
||||
}
|
||||
|
||||
// gone with the wind
|
||||
Device->DisplayOn( Device );
|
||||
Device->Update( Device );
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static const struct GDS_Device ILI9341 = {
|
||||
.DisplayOn = DisplayOn, .DisplayOff = DisplayOff, .SetContrast = SetContrast,
|
||||
.SetVFlip = SetVFlip, .SetHFlip = SetHFlip,
|
||||
.Update = Update, .Init = Init,
|
||||
};
|
||||
|
||||
struct GDS_Device* ILI9341_Detect(char *Driver, struct GDS_Device* Device) {
|
||||
if (!strcasestr(Driver, "ILI9341")) return NULL;
|
||||
|
||||
if (!Device) Device = calloc(1, sizeof(struct GDS_Device));
|
||||
|
||||
*Device = ILI9341;
|
||||
Device->Depth = 4;
|
||||
|
||||
return Device;
|
||||
}
|
||||
|
||||
|
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Reference in New Issue
Block a user